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Foundation Course & DFT Learning and Reference Materials

Course Instructor

FREE

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Course Overview

Schedule of Classes

Course Curriculum

5 Subjects

Foundation Course & DFT Learning and Reference Materials

37 Learning Materials

Digital Design Slides

Digital Design Slides

PDF

CMOS Devices and Technology Slides

CMOS Devices and Technology Slides

PDF

Verilog HDL Slides

Verilog HDL Slides

PDF

Linux Essentials slides

Linux Essentials Basics and GVIM

PDF

DFT Theory Slides

Module 1 Introduction To DFT and DFT Basics

PDF

Module 2 Scan Insertion

PDF

Module 3 Scan Compression and OCC

PDF

Module 4 Boundary Scan

PDF

Module 5 Introduction to ATPG and ATPG Basics

PDF

Module 6 ATPG Fault Models

PDF

Module 7 Fault Classes

PDF

Module 8 ATPG Simulation

PDF

Module 9 ATPG Diagnosis

PDF

Module 10 Introduction to BIST

PDF

DFT Lab Slides

Scan Lab 1 Introduction to Scan Lab Basics

PDF

Scan Lab 2a Tool Invoke Lab

PDF

Scan Lab 2b Violation and Fix_DC_Commands

PDF

Scan Lab 2c Violation and Fix

PDF

Scan Lab 2d Multi Chain Scan Insertion

PDF

Scan Lab 3a Compression Ratio Lab 1

PDF

Scan Lab 3b Compression Ratio Lab 2

PDF

Scan Lab 3c Compression Lab CTL File

PDF

Scan Lab 3d OCC Insertion

PDF

JTAG Boundary Scan Insertion with simulation

PDF

ATPG Lab 1 Introduction to TetraMAX

PDF

ATPG Lab 2 DRC Fix Scan Chain Violation and Pattern

PDF

ATPG Lab 3 Introduction to ATPG Lab

PDF

ATPG Lab 4 Introduction to ATPG Lab

PDF

ATPG Lab 5 Simulation Lab

PDF

ATPG Lab 6 ATPG Coverage and Diagnosis

PDF

Synopsys Tool Manuals

ATPG c1

PDF

ATPG

PDF

TMAX User Guide

PDF

tmax_cmds

PDF

tmax_rules

PDF

Reference Books

VLSI Test Principles and Architectures

PDF

Reference Book Link

PDF

Digital Design

46 Learning Materials

Digital Fundamentals

Introduction - 1

Video
2:59

Analog and Digital Signal

Video
4:48

How Digital Signals Obtained

Video
7:28

Digital System Over Analog System

Video
4:7

Summary

Video
040

Number System

Introduction - 2

Video
14:41

Number Based Converstion

Video
35:52

Signed and Unsigned Numbers

Video
24:14

Binary Arithmetic

Video
30:56

Binary Codes

Introduction - 3

Video
3:44

Binary Coded Decimal

Video
4:58

Excess-3 Code and Gray code

Video
7:37

Binary To Gray Code Conversion

Video
9:22

Gray Code To Binary Conversion

Video
6:21

Alphanumeric Codes

Video
2:17

Error Detecting Codes

Video
6:43

Self Complementry Property

Video
9:5

Boolean Algebra

Introduction - 4

Video
4:2

Logic gates

Video
5:56

Boolean Theorems and Properties

Video
11:58

Canonical Standard Forms

Video
9:3

Standard Form to Logic Diagram

Video
3:34

Gate Level Minimisation

Introduction - 5

Video
2:46

Map Methods

Video
8:34

K-MAP Rules

Video
4:8

AOI Implementation

Video
1:56

K Map Examples

Video
23:34

Combinational Logic Circuits

Introduction - 6

Video
5:44

Adders

Video
19:33

Ripple Carry Adder

Video
10:55

Carry Look Ahead Adder

Video
9:53

Decoder

Video
10:20

Encoder

Video
8:44

Multiplexer

Video
11:50

De Multiplexer

Video
7:23

Magnitude Comparator

Video
7:43

Sequential Circuits

Introduction -7

Video
7:13

Flip-Flop

Video
9:57

Latches

Video
9:00

Register

Video
13:29

Counter

Video
13:51

Finite State Machine

Melay and Moore FSM

Video
22:49

Memory

Introduction 7

Video
9:25

RAM

Video
16:16

ROM

Video
11:22

Programmable Logic Devices

PLD,PLA and FPGA

Video
15:14

CMOS Devices and Technology

17 Learning Materials

Electronic Devices and Power Supply

Electronic Components and Power Sources

Video
40:42

Network Theorems

Video
21:46

Semiconductor Physics

Semiconductor Physics basics

Video
41:34

Semiconductor Physics PN Device

Video
24:23

Transistors

BJT and VI Characteristics

Video
35:17

MOSFET and VI Characteristics

Video
31:36

Logic Gate CMOS Implementation

Inveter with different loads

Video
16:58

CMOS logic Gates

Video
18:48

CMOS Boolean Expression Implementation

Video
15:6

Stick Diagram and Layout

Stick Diagram

Video
31:6

CMOS logic gates Layout

Video
18:48

Process Technology

Wafer Manufacturing Process Diffusion Ion Implantation

Video
14:49

NMOS Fabrication Process

Video
1:13:18

Second Order Effects

Body Effect and Channel Length Modulation

Video
28:24

Cross Talk Analysis Delta Delay Antenna Effects

Video
21:59

Punch Through Latch Up DIBL

Video
30:55

Net Parasitics

Interconnect Parasitic ,Parasitic Variations, PVT Conditions

Video
46:14

Verilog for Design & Verification

Language Introduction

Data Types and Operators

Sequential Circuit Modeling

Procedural Timing Controls & amp Conditional Statements

Tasks and Functions

Essentials Of LINUX

LINUX Commands

GVIM

Course Instructor